Please select a product from the list below:
Available Products:
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54AC139
x2 independent 1–of–4 decoders, decoding a 2 bit address to 1–of–4 active–low outputs. Active–low Selects facilitate the demultiplexing & cascading functions. Demultiplexing uses Address inputs to select desired device output & Select as data input.
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54HC138
The 54HC138 3-Line to 8-Line Decoder/Demultiplexer is produced on a 2.5µm 5V CMOS process combining high speed LSTTL performance with CMOS low power consumption. Inputs are compatible with CMOS outputs & also LSTTL outputs via pull-up resistors.
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54HC139
x2 independent 1–of–4 decoders, decoding a 2 bit address to 1–of–4 active–low outputs. Active–low Selects facilitate the demultiplexing & cascading functions. Demultiplexing uses Address inputs to select desired device output & Select as data input.
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54HC154
Four address inputs decode to 1-of-16 outputs. Two chip enables facilitate demultiplexing & cascading. Demultiplexing uses x1 enable input as multiplexed data input. If the other enable input is low,addressed output follows the state of applied data.
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54HCT153
The 54HCT153 is produced using a 2.5um 5V CMOS process and provides x2 4-Input Multiplexers. Each Multiplexer comprises an independant enable with common data select inputs.
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54LS138
3-to-8 Line Decoder/Demultiplexer made on a 2µm 40V Bipolar process. Decodes 1-of-8 lines, set by 3 binary select inputs & 3 enable inputs. Operates as 8-output demultiplexer by 1 active LOW Enable set as data input & other Enable inputs as strobes.
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54LS157
The 54LS157 is produced on a 2µm 40V Bipolar process & provides x4 2-input (A or B) to output (Y) data selectors / multiplexers. Output data presents in non-inverted form. A high on Output Enable input sets all four Y outputs to a low level.
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54LV139
x2 independent 1–of–4 decoders, decoding a 2 bit address to 1–of–4 active–low outputs. Active–low Selects facilitate the demultiplexing & cascading functions. Demultiplexing uses Address inputs to select desired device output & Select as data input.
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74AC139
x2 independent 1–of–4 decoders, decoding a 2 bit address to 1–of–4 active–low outputs. Active–low Selects facilitate the demultiplexing & cascading functions. Demultiplexing uses Address inputs to select desired device output & Select as data input.
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74HC138
The 74HC138 3-Line to 8-Line Decoder/Demultiplexer is produced on a 2.5µm 5V CMOS process combining high speed LSTTL performance with CMOS low power consumption. Inputs are compatible with CMOS outputs & also LSTTL outputs via pull-up resistors.
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74HC139
x2 independent 1–of–4 decoders, decoding a 2 bit address to 1–of–4 active–low outputs. Active–low Selects facilitate the demultiplexing & cascading functions. Demultiplexing uses Address inputs to select desired device output & Select as data input.
-
74HC154
Four address inputs decode to 1-of-16 outputs. Two chip enables facilitate demultiplexing & cascading. Demultiplexing uses x1 enable input as multiplexed data input. If the other enable input is low,addressed output follows the state of applied data.
-
74HCT153
The 74HCT153 is produced using a 2.5um 5V CMOS process and provides x2 4-Input Multiplexers. Each Multiplexer comprises an independant enable with common data select inputs.
-
74LS138
3-to-8 Line Decoder/Demultiplexer made on a 2µm 40V Bipolar process. Decodes 1-of-8 lines, set by 3 binary select inputs & 3 enable inputs. Operates as 8-output demultiplexer by 1 active LOW Enable set as data input & other Enable inputs as strobes.
-
74LS157
The 74LS157 is produced on a 2µm 40V Bipolar process & provides x4 2-input (A or B) to output (Y) data selectors / multiplexers. Output data presents in non-inverted form. A high on Output Enable input sets all four Y outputs to a low level.
-
74LV139
x2 independent 1–of–4 decoders, decoding a 2 bit address to 1–of–4 active–low outputs. Active–low Selects facilitate the demultiplexing & cascading functions. Demultiplexing uses Address inputs to select desired device output & Select as data input.
