Please select a product from the list below:
Available Products:
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54HC109
The 54HC109 is fabricated in 2.5µm 5V CMOS. The J and K logic level at the positive clock edge changes the device output state. Set & Reset functions are asynchronous, independent of clock & are executed by a logic low on the corresponding input.
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54HC112
The 54HC112 is fabricated in 2.5µm 5V CMOS. The J and K logic level at the negative clock edge changes the device output state. Set & Reset functions are asynchronous, independent of clock & are executed by a logic low on the corresponding input.
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74HC109
The 74HC109 is fabricated in 2.5µm 5V CMOS. The J and K logic level at the positive clock edge changes the device output state. Set & Reset functions are asynchronous, independent of clock & are executed by a logic low on the corresponding input.
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74HC112
The 74HC112 is fabricated in 2.5µm 5V CMOS. The J and K logic level at the negative clock edge changes the device output state. Set & Reset functions are asynchronous, independent of clock & are executed by a logic low on the corresponding input.
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CD4027B
The CD4027B Dual J-K Master-Slave Flip-Flop consists of x2 identical complementary-symmetry J-K master-slave flip-flops. Each flip-flop is provisioned for individual J, K, Set Reset, & Clock input signals with buffered Q & Q \ output signals.
