Quality Overview


We are fully certified to ISO9001:2015, download our certificate HERE.

  • 100% of wafers are processed in a Class 10K/ISO-4 clean-room
  • 100% of singulated bare die are handled under Class 100/ISO-2 (laminar flow)
  • 100% of outgoing die are inspected to either MIL-STD-750 or MIL-STD-883 dependent on device type. 

Process Flows

We support three orderable quality grades:

  • Standard - indicated by no part number suffix
  • H Grade - indicated by H part number suffix
  • K Grade - indicated by K part number suffix.

Standard Flow

Summary

Die are 100% DC probe tested to datasheet at 25°C.

AC and Dynamic tests are not production tested at die level and characterized by chip design and the original device qualification.

Die are 100% Visually inspected to below Military Visual Standards.

  • Mil-STD-750 Method 2072 for Transistors
  • Mil-STD-750 Method 2073 for Diodes
  • Mil-STD-883 Method 2010B for Integrated Circuits

H Grade Flow

Click for full H Grade Screening Process Description 

Summary

Die are 100% DC probe tested to datasheet conditions at 25°C with guardbanded parameters for temperature extremity.

Guardband parameters are defined by chip design and the original device qualification.

A sample from the wafer lot is assembled and tested to assess performance at temperature extremity.

AC and Dynamic tests are not production tested at die level and are defined by chip design and the original device qualification.

Die are 100% Visually inspected to Military Visual Standards.

Screening coverage spans single diffusion run.

K Grade Flow

Click for full K Grade Screening Process Description

Summary

Die are 100% DC probe tested to datasheet conditions at 25°C with guard-banded parameters for temperature extremity.

Guardband parameters are defined by chip design and the original device qualification.

A sample from the wafer lot is assembled and tested to assess performance at temperature extremity.

AC and Dynamic tests are not production tested at die level and are defined by chip design, AC testing is performed on the packaged sample.

Die are 100% Visually inspected to Military Visual Standards.  Integrated Circuits are inspected to a higher "A" grade criteria.

Screening coverage spans single wafer.